The Fedi Meta, TBS, Blocklists, Everything Summarized
I've written out a very, very long blog post intended to be both a refresher for anyone who hasn't been following all this shit and as my side of the story for some of the more contentious elements, and I encourage anyone who cares about this kind of stuff to give it a read when they can: https://blog.silvereagle.dev/d/3z9flj7l49
I love this thing so much #webgbcam
RE: https://computerfairi.es/users/mavica_again/statuses/111366357844392494
i might have to just. redo the WHOLE ui. and it's probably no longer going to be part of the camera frame. we'll see. still haven't thought how to handle this
it's going well
the UI will be refactored, but i was too eager to play with the filter first
Regarding #FPGA shenanigans, pretty much everyone I talked to about learning #VHDL said, "Don't do that! Learn #Verilog or #SystemVerilog instead."
My original impression was that, while VHDL is harder, you're less likely to shoot yourself in the foot than with Verilog.
Does anyone here have any opinions on this?
scourge of the fediverse, retired computer fairies founder (2017-2021), drone #6502, official amiga mascot, begrudgingly making a return to the fediverse to upset those who told us to leave. i've been here longer than you.
https://pronoun.gdn/byte?or=it, robot, check system link above, meat shell is 30yo, no minors thanks
HRT: 15/11/2015
⚠️ do not like or favourite my negative posts: https://computerfairi.es/@mavica_again/110573733959251340 you will be blocked for not following protocol